Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science

Proposal for Thesis Research in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy

Title: Abacus: A Reconfigurable Bit-Parallel SIMD Architecture

Submitted by:  Michael Bolotski
38 Marion St.  (Signature of author)

Somerville, MA 02143

Date of submission: May 1996 Expected Date of Completion: August 1996 Laboratory where thesis will be done: Artificial Intelligence Laboratory Brief Statement of the Problem: Reconfiguration is the ability to dynamically configure memory organization, ALU width, or communication network topology to match the needs of the computational problem. Parallel computers based on reconfigurable bit-slice architectures can be an order of magnitude faster on important applications than those based on conventional architectures. This dissertation will validate the thesis with an implementation-based approach.