*** IDIV ***

IDSTATE =  0
{{4{b_sgn}},b[63:0]}		~>	div		intb_div
{4'b0,a[63:0]}			~>	rem_s		inta_rems
a[63:0] / b[63:0] / ip[63:0]	~>	res		a_res/b_res/ip_res
(	div[67:0]		~>	dbus	)	div_dbus
(	68'b0			~>	rem_c	)	zero_remc
(	68'b0			~>	rem_low	)	zero_reml
(	64'b0			~>	lz_in	)	zero_lz
(	64'b0			~>	sh_in	)	zero_sh
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b

IDSTATE =  1
div[67:0]			~>	dbus		div_dbus
dbus[67:0]			@~>	cpa_a		dbus_a
68'b0				~>	cpa_b		zero_b
div[67:0]			~>	div		hold_div
(	68'b0			~>	rem_c	)	zero_remc
(	68'b0			~>	rem_low	)	zero_reml
(	64'b0			~>	lz_in	)	zero_lz
(	64'b0			~>	sh_in	)	zero_sh
(	res[63:0]		~>	res	)	hold_res

IDSTATE =  2
div[67:0]			~>	dbus		div_dbus
dbus[67:0]			@~>	cpa_a		dbus_a
68'b0				~>	cpa_b		zero_b
add_out[67:0]			~>	div		adder_div
(	68'b0			~>	rem_c	)	zero_remc
(	68'b0			~>	rem_low	)	zero_reml
(	64'b0			~>	lz_in	)	zero_lz
(	64'b0			~>	sh_in	)	zero_sh

IDSTATE = 3
div[67:0]	 		~>	dbus		div_dbus
dbus[63:0]			~>	lz_in		idbus_lz
(	64'b0			~>	sh_in	)	zero_sh
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	68'b0			~>	rem_c	)	zero_remc
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_low	)	zero_reml
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	div[67:0]		~>	div	)	hold_div

IDSTATE = 4
rem_s[63:0]			~>	sh_in		rems_sh
{4'b0,sh_out[63:0]}		~>	shift_out	to_reml
shift_out[67:0]			~>	rem_low		shifter_reml
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	lz_in	)	zero_lz
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div

IDSTATE = 5
rem_s[63:0]			~>	sh_in		rems_sh
{{4{a_sgn}},sh_out[63:0]}	~>	shift_out	to_rems_int
shift_out[67:0]			~>	rem_s		shifter_rems
{rem_low[65:0],2'b0}		~>	rem_low		reml_shift
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	lz_in	)	zero_lz
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	res[67:0]		~>	res	)	hold_res
(	div[67:0]		~>	div	)	hold_div

IDSTATE = 6
div[67:0]			~>	dbus		div_dbus
dbus[63:0]			~>	sh_in		dbus_sh
{4'b0001,sh_out[63:0]}		~>	shift_out	to_div
shift_out[67:0]			~>	div		shifter_div
{rem_low[65:0],2'b0}		~>	rem_low		reml_shift
68'b0				~>	rem_c		zero_remc
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b


IDSTATE = 7 -> 39
****************************iter*******************************
{rem_low[65:0],2'b0}		~>	rem_low		reml_shift
div[67:0]			~>	dbus		div_dbus
rem_s,rem_c,dbus		~>	iter_stage	
iter_stage			~>	iter_rems,c	qp2/qp1/q0/qn1/qn2
{iter_rems[65:0],rem_low[1:0]}	~>	rem_s		eval
{iter_remc[65:0],2'b0}		~>	rem_c		eval
(	res[67:0]		~>	res	)	hold_res
(	div[67:0]		~>	div	)	hold_div
(	64'b0			~>	lz_in	)	zero_lz
(	64'b0			~>	sh_in	)	zero_sh
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
***************************************************************

IDSTATE = 40
rem_s[67:0]			~>	cpa_a		rems_a
{rem_c[66:0],gnd!}		~>	cpa_b		remc_b
rem_s[67:0]			~>	rem_s		hold_rems
rem_c[67:0]			~>	rem_c		hold_remc
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	lz_in	)	zero_lz
(	64'b0			~>	sh_in	)	zero_sh
(	res[67:0]		~>	res	)	hold_res
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

IDSTATE = 41
rem_s[67:0]			~>	cpa_a		rems_a
{rem_c[66:0],gnd!}		~>	cpa_b		remc_b
add_out[67:0]			~>	rem_s		adder_rems
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	lz_in	)	zero_lz
(	64'b0			~>	sh_in	)	zero_sh
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

IDSTATE = 42
rem_s[63:0]			~>	lz_in		rems_lz
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	sh_in	)	zero_sh
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

IDSTATE = 43
qn / qp[67:0]			~>	dbus		qn_dbus/qp_dbus
dbus[67:0]			@~>	cpa_a		dbus_a
68'b0				~>	cpa_b		zero_b
(	res[67:0]		~>	res	)	hold_res
(	64'b0			~>	sh_in	)	zero_sh
(	64'b0			~>	lz_in	)	zero_lz
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

IDSTATE = 44
qn / qp[67:0]			~>	dbus		qn_dbus/qp_dbus
dbus[67:0]			@~>	cpa_a		dbus_a
68'b0				~>	cpa_b		zero_b
add_out[63:0] /			~>	res		final_res,int
/ {errtype[9:0],res[53:0]}	~>	res		errval_res
(	64'b0			~>	sh_in	)	zero_sh
(	64'b0			~>	lz_in	)	zero_lz
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml
	
IDSTATE = 45
res[63:0]			~>	wb		res_wb
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	sh_in	)	zero_sh
(	64'b0			~>	lz_in	)	zero_lz
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml




*** FDIV ***

FDSTATE = 0
{b_uflw_L,b[51:0],11'b0}	~>	lz_in		b_lz
{b_uflw_L,b[51:0],11'b0}	~>	div		b_div
{4'b0,a_uflw_L,a[51:0],11'b0}	~>	rem_s		flta_rems
a[63:0] / b[63:0] / ip[63:0]	~>	res		a_res/b_res/ip_res
(	68'b0			~>	rem_c	)	zero_remc
(	68'b0			~>	rem_low	)	zero_reml
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	sh_in	)	zero_sh

FDSTATE = 1
rem_s[63:0]			~>	lz_in		rems_lz
div[67:0]			~>	dbus		div_dbus
dbus[63:0]			~>	sh_in		dbus_sh
{4'b0001,sh_out[63:0]}		~>	shift_out	to_div
shift_out[67:0]			~>	div		shifter_div
68'b0				~>	rem_c		zero_remc
68'b0				~>	rem_low		zero_reml
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	div[67:0]		~>	dbus	)	div_dbus
(	rem_s[67:0]		~>	rem_s	)	hold_rems

FDSTATE = 2 -> 31
****************************iter*******************************
{rem_low[65:0],2'b0}		~>	rem_low		reml_shift
div[67:0]			~>	dbus		div_dbus
rem_s,rem_c,dbus		~>	iter_stage	
iter_stage			~>	iter_rems,c	qp2/qp1/q0/qn1/qn2
{iter_rems[65:0],rem_low[1:0]}	~>	rem_s		eval
{iter_remc[65:0],2'b0}		~>	rem_c		eval
(	res[67:0]		~>	res	)	hold_res
(	div[67:0]		~>	div	)	hold_div
(	64'b0			~>	lz_in	)	zero_lz
(	64'b0			~>	sh_in	)	zero_sh
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
***************************************************************

FDSTATE = 32
rem_s[67:0]			~>	cpa_a		rems_a
{rem_c[66:0],1'b0}		~>	cpa_b		remc_b
rem_s[67:0]			~>	rem_s		hold_rems
rem_c[67:0]			~>	rem_c		hold_remc
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	sh_in	)	zero_sh
(	64'b0			~>	lz_in	)	zero_lz
(	res[67:0]		~>	res	)	hold_res
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

FDSTATE = 33
rem_s[67:0]			~>	cpa_a		rems_a
{rem_c[66:0],1'b0}		~>	cpa_b		remc_b
add_out[67:0]			~>	rem_s		adder_rems
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	sh_in	)	zero_sh
(	64'b0			~>	lz_in	)	zero_lz
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml
	
FDSTATE = 34
qn/qp[67:0]			~>	dbus		qn_dbus/qp_dbus
{dbus[62:0],1'b0}		~>	lz_in		fdbus_lz
(	div[67:0]		~>	div	)	hold_div
(	64'b0			~>	sh_in	)	zero_sh
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	68'b0			~>	rem_c	)	zero_remc
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_low	)	zero_reml

FDSTATE = 35
qn/qp[67:0]			~>	dbus		qn_dbus/qp_dbus
dbus[63:0]			~>	sh_in		dbus_sh
{4'b0000,sh_out[63:0]}		~>	shift_out	to_div
shift_out[67:0]			~>	div		shifter_div
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	68'b0			~>	rem_c	)	zero_remc
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_low	)	zero_reml
(	64'b0			~>	lz_in	)	zero_lz

FDSTATE = 36
div[67:0]			~>	dbus		div_dbus
dbus[67:0]			~>	cpa_a		dbus_a
{58'b0,1'b1,9'b0}		~>	cpa_b		stky_b
rem_s[67:0]			~>	rem_s		hold_rems
rem_s[63:0]			~>	lz_in		rems_lz
(	64'b0			~>	sh_in	)	zero_sh
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

FDSTATE = 37
div[67:0]			~>	dbus		div_dbus
dbus[67:0]			~>	cpa_a		dbus_a
{58'b0,1'b1,9'b0}		~>	cpa_b		stky_b
add_out[67:0]			~>	rem_s		adder_rems
rem_s[63:0]			~>	lz_in		rems_lz
(	64'b0			~>	sh_in	)	zero_sh
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

FDSTATE = 38
div[67:0]			~>	dbus		div_dbus
{r_sgn,r_exp[10:0],dbus[60:9]} /~>	res		final_res,flt_norm
{" "," ",rem_s[60:0]} /		~>	res		final_res,flt_plus1
{" "," ",rem_s[61:10]} /	~>	res		final_res,flt_ovr
{" "," ",52'b0} /		~>	res		final_res,zero_res
{13'b1111111111111,51'b0} /	~>	res		final_res,nan_res
/ {errtype[9:0],res[53:0]}	~>	res		errval_res
(	64'b0			~>	sh_in	)	zero_sh
(	64'b0			~>	lz_in	)	zero_lz
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

FDSTATE = 39
res[63:0]			~> 	wb		res_wb
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	sh_in	)	zero_sh
(	64'b0			~>	lz_in	)	zero_lz
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml



*** FSQRT ***

FSSTATE = 0
{b_uflw_L,b[51:0],11'b0}	~>	lz_in		b_lz
{b_uflw_L,b[51:0],11'b0}	~>	div		b_div
b[63:0] / ip[63:0]		~>	res		b_res/ip_res
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	68'b0			~>	rem_c	)	zero_remc
(	68'b0			~>	rem_low	)	zero_reml
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	sh_in	)	zero_sh

FSSTATE = 1
div[67:0]			~>	dbus		div_dbus
dbus[63:0]			~>	sh_in		dbus_sh
{4'b1101,sh_out[63:0]} /	~>	shift_out	to_rems_sqevn
/ {3'b111,sh_out[63:0],1'b0} 	~>	shift_out	to_rems_sqodd
shift_out[67:0]			~>	rems		shifter_rems
68'b0				~>	rem_c		zero_remc
68'b0				~>	rem_low		zero_reml
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	lz_in	)	zero_lz

FSSTATE = 2
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	lz_in	)	zero_lz
(	div[67:0]		~>	div	)	hold_div
(	64'b0			~>	sh_in	)	zero_sh
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	68'b0			~>	rem_c	)	zero_remc
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_low	)	zero_reml

FSSTATE = 3 -> 32
****************************iter*******************************
{rem_low[65:0],2'b0}		~>	rem_low		reml_shift
qp[67:0]/qn[67:0]		~>	dbus		qp_dbus/qn_dbus
rem_s,rem_c,dbus		~>	iter_stage	
iter_stage			~>	iter_rems,c	qp2/qp1/q0/qn1/qn2
{iter_rems[65:0],rem_low[1:0]}	~>	rem_s		eval
{iter_remc[65:0],2'b0}		~>	rem_c		eval
(	res[67:0]		~>	res	)	hold_res
(	div[67:0]		~>	div	)	hold_div
(	64'b0			~>	lz_in	)	zero_lz
(	64'b0			~>	sh_in	)	zero_sh
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
***************************************************************

FDSTATE = 33
rem_s[67:0]			~>	cpa_a		rems_a
{rem_c[66:0],1'b0}		~>	cpa_b		remc_b
rem_s[67:0]			~>	rem_s		hold_rems
rem_c[67:0]			~>	rem_c		hold_remc
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	sh_in	)	zero_sh
(	64'b0			~>	lz_in	)	zero_lz
(	res[67:0]		~>	res	)	hold_res
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

FDSTATE = 34
rem_s[67:0]			~>	cpa_a		rems_a
{rem_c[66:0],1'b0}		~>	cpa_b		remc_b
add_out[67:0]			~>	rem_s		adder_rems
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	sh_in	)	zero_sh
(	64'b0			~>	lz_in	)	zero_lz
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

FSSTATE = 35
qn/qp[67:0]			~>	dbus		qn_dbus/qp_dbus
dbus[63:0]			~>	sh_in		dbus_sh
{4'b0000,sh_out[63:0]}		~>	shift_out	to_div
shift_out[67:0]			~>	div		shifter_div
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	68'b0			~>	rem_c	)	zero_remc
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_low	)	zero_reml
(	64'b0			~>	lz_in	)	zero_lz

FDSTATE = 36
div[67:0]			~>	dbus		div_dbus
dbus[67:0]			~>	cpa_a		dbus_a
{58'b0,1'b1,9'b0}		~>	cpa_b		stky_b
rem_s[67:0]			~>	rem_s		hold_rems
rem_s[63:0]			~>	lz_in		rems_lz
(	64'b0			~>	sh_in	)	zero_sh
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

FDSTATE = 37
div[67:0]			~>	dbus		div_dbus
dbus[67:0]			~>	cpa_a		dbus_a
{58'b0,1'b1,9'b0}		~>	cpa_b		stky_b
add_out[67:0]			~>	rem_s		adder_rems
rem_s[63:0]			~>	lz_in		rems_lz
(	64'b0			~>	sh_in	)	zero_sh
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

FSSTATE = 38
div[67:0]			~>	dbus		div_dbus
{r_sgn,r_exp[10:0],dbus[60:9]} /~>	res		final_res,flt_norm
{" "," ",rem_s[60:0]} /		~>	res		final_res,flt_plus1
{" "," ",rem_s[61:10]} /	~>	res		final_res,flt_ovr
{" "," ",52'b0} /		~>	res		final_res,zero_res
{13'b1111111111111,51'b0} /	~>	res		final_res,nan_res
/ {errtype[9:0],res[53:0]}	~>	res		errval_res
(	64'b0			~>	sh_in	)	zero_sh
(	64'b0			~>	lz_in	)	zero_lz
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

FSSTATE = 39
res[63:0]			~> 	wb		res_wb
(	div[67:0]		~>	dbus	)	div_dbus
(	64'b0			~>	sh_in	)	zero_sh
(	64'b0			~>	lz_in	)	zero_lz
(	68'b0			~>	cpa_a	)	zero_a
(	68'b0			~>	cpa_b	)	zero_b
(	rem_s[67:0]		~>	rem_s	)	hold_rems
(	res[67:0]		~>	res	)	hold_res
(	68'b0			~>	rem_c	)	zero_remc
(	div[67:0]		~>	div	)	hold_div
(	68'b0			~>	rem_low	)	zero_reml

